[PATCH] D117947: [RISCV] Don't allow i64 vector div by constant to use mulh with Zve64x

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll:3
+; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32,V,RV32-V
+; RUN: llc -mtriple=riscv32 -mattr=+zve64x -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32,ZVE64X,RV32-ZVE64X
+; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64,V,RV64-V
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Did you run the make check-llvm after running the script? FileCheck doesn't like prefixes to appear in check-prefixes if it doesn't appear in the test file. RV32-ZVE64X does not appear on any lines.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D117947/new/

https://reviews.llvm.org/D117947