[PATCH] D116421: [RISCV][LegalizeIntegerTypes] Teach PromoteSetCCOperands not to sext i32 comparisons for RV64 if the promoted values are already zero extended.
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 4 11:18:13 PST 2022
efriedma added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:1753
+ // inserting a zext_inreg operation that we might not be able to remove.
+ if (ISD::isIntEqualitySetCC(CCCode)) {
+ unsigned OpLEffectiveBits = DAG.ComputeMinSignedBits(OpL);
----------------
Do we need to check isIntEqualitySetCC here? We can sign-extend the operands of unsigned comparisons if we want to.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116421/new/
https://reviews.llvm.org/D116421
More information about the llvm-commits
mailing list