[PATCH] D115863: [SVE][CodeGen] Use splice instruction when lowering VECTOR_SPLICE

[David Sherwood via Phabricator via llvm-commits]

david-arm added a comment.

@sdesmalen it seems we have tests that explicitly rely upon working when the splice index > min number of elements. When I add something to the Verifier.cpp these tests fail:

Failed Tests (2):

  LLVM :: CodeGen/AArch64/named-vector-shuffles-neon.ll
  LLVM :: CodeGen/AArch64/named-vector-shuffles-sve.ll

It looks like we permit out-of-bounds indices for all vectors, and in SelectionDAGBuilder::visitVectorSplice we do no checks for scalable vectors, but do return undef for out-of-bounds indices for fixed-width, i.e.

  // VECTOR_SHUFFLE doesn't support a scalable mask so use a dedicated node.
  if (VT.isScalableVector()) {
    MVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout());
    setValue(&I, DAG.getNode(ISD::VECTOR_SPLICE, DL, VT, V1, V2,
                             DAG.getConstant(Imm, DL, IdxVT)));
    return;
  }
  
  unsigned NumElts = VT.getVectorNumElements();
  
  if ((-Imm > NumElts) || (Imm >= NumElts)) {
    // Result is undefined if immediate is out-of-bounds.
    setValue(&I, DAG.getUNDEF(VT));
    return;
  }

I'm happy to change the LangRef and definition of the intrinsic so that we can enforce indices <= known min number of elements. This would allow me to remove the `-IdxVal <= getVectorMinNumElements()` check in the lowering code.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D115863/new/

https://reviews.llvm.org/D115863