[PATCH] D115227: [AMDGPU] Mark time intrinsics as nomem, hassideeffects
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 7 08:25:00 PST 2021
This revision was automatically updated to reflect the committed changes.
Closed by commit rG077a14e00b75: [AMDGPU] Mark time intrinsics as nomem, hassideeffects (authored by foad).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D115227/new/
https://reviews.llvm.org/D115227
Files:
llvm/include/llvm/IR/IntrinsicsAMDGPU.td
llvm/lib/Target/AMDGPU/SMInstructions.td
Index: llvm/lib/Target/AMDGPU/SMInstructions.td
===================================================================
--- llvm/lib/Target/AMDGPU/SMInstructions.td
+++ llvm/lib/Target/AMDGPU/SMInstructions.td
@@ -181,15 +181,8 @@
" $sdst", [(set i64:$sdst, (node))]> {
let hasSideEffects = 1;
- // FIXME: This should be definitively mayStore = 0. TableGen
- // brokenly tries to infer these based on the intrinsic properties
- // corresponding to the IR attributes. The target intrinsics are
- // considered as writing to memory for IR dependency purposes, but
- // those can be modeled with hasSideEffects here. These also end up
- // inferring differently for llvm.readcyclecounter and the amdgcn
- // intrinsics.
- let mayStore = ?;
- let mayLoad = 1;
+ let mayStore = 0;
+ let mayLoad = 0;
let has_sbase = 0;
let has_offset = 0;
}
Index: llvm/include/llvm/IR/IntrinsicsAMDGPU.td
===================================================================
--- llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+++ llvm/include/llvm/IR/IntrinsicsAMDGPU.td
@@ -1284,7 +1284,7 @@
def int_amdgcn_s_memtime :
GCCBuiltin<"__builtin_amdgcn_s_memtime">,
- Intrinsic<[llvm_i64_ty], [], [IntrWillReturn]>;
+ Intrinsic<[llvm_i64_ty], [], [IntrNoMem, IntrHasSideEffects, IntrWillReturn]>;
def int_amdgcn_s_sleep :
GCCBuiltin<"__builtin_amdgcn_s_sleep">,
@@ -1726,7 +1726,7 @@
def int_amdgcn_s_memrealtime :
GCCBuiltin<"__builtin_amdgcn_s_memrealtime">,
- Intrinsic<[llvm_i64_ty], [], [IntrWillReturn]>;
+ Intrinsic<[llvm_i64_ty], [], [IntrNoMem, IntrHasSideEffects, IntrWillReturn]>;
// llvm.amdgcn.ds.permute <index> <src>
def int_amdgcn_ds_permute :
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D115227.392420.patch
Type: text/x-patch
Size: 1675 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20211207/8319500e/attachment.bin>
More information about the llvm-commits
mailing list