[PATCH] D114800: [PowerPC] Replace MFVSRLD with MFVSRD when the vector is symmetrical

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCMIPeephole.cpp:411
+    break;
+  case PPC::VMAXUD:
+  case PPC::VMAXSD:
----------------
Is this just any instruction that sets `isCommutable = 1`?


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  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D114800/new/

https://reviews.llvm.org/D114800