[PATCH] D114804: [RISCV] Align odd address in assemble code

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


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Comment at: llvm/test/MC/RISCV/align-odd.s:1
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=-relax %s -o %t
+# RUN: llvm-objdump -d %t | FileCheck %s
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+relax? +c? (and maybe riscv32?)


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Comment at: llvm/test/MC/RISCV/align-odd.s:2
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=-relax %s -o %t
+# RUN: llvm-objdump -d %t | FileCheck %s
+
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Pipe to llvm-objdump, don't needlessly create temporary files


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Comment at: llvm/test/MC/RISCV/align-odd.s:4
+
+#       CHECK:000000000000000 <.text>:
+#  CHECK-NEXT:       0: 01 00
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Weird formatting in this whole block, and I don't see why we need this particular CHECK line


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Comment at: llvm/test/MC/RISCV/align-odd.s:12
+
+  .text
+  .byte 1
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.text is the default

Don't indent assembly when there are no labels involved


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Comment at: llvm/test/MC/RISCV/align-odd.s:14
+  .byte 1
+  .word 0
+  .p2align 3
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This only ever tests odd->even, it doesn't test 1mod4->multiple of 4 for !RVC


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D114804/new/

https://reviews.llvm.org/D114804