[PATCH] D114804: [RISCV] Align odd address in assemble code

[luxufan via Phabricator via llvm-commits]

StephenFan created this revision.
StephenFan added reviewers: asb, jrtc27, MaskRay, craig.topper.
Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, hiraditya.
StephenFan requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

In the past, llvm riscv assember can't align odd address. It can only align address which is multiple of 2 or 4.

In this patch, first insert zeros to make the address is 2 or 4 align, then utilize the nop instruction to align the address to the given align value.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D114804

Files:
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
  llvm/test/MC/RISCV/align-odd.s


Index: llvm/test/MC/RISCV/align-odd.s
===================================================================
--- /dev/null
+++ llvm/test/MC/RISCV/align-odd.s
@@ -0,0 +1,16 @@
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=-relax %s -o %t
+# RUN: llvm-objdump -d %t | FileCheck %s
+
+#       CHECK:000000000000000 <.text>:
+#  CHECK-NEXT:       0: 01 00
+#  CHECK-NEXT:       2: 00 00
+#  CHECK-NEXT:       4: 00 00
+#  CHECK-NEXT:       6: 00 00
+#  CHECK-NEXT:       8: 33 05 a5 00
+
+
+  .text
+  .byte 1
+  .word 0
+  .p2align 3
+  add a0, a0, a0
Index: llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
===================================================================
--- llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -357,8 +357,10 @@
   bool HasStdExtC = STI->getFeatureBits()[RISCV::FeatureStdExtC];
   unsigned MinNopLen = HasStdExtC ? 2 : 4;
 
-  if ((Count % MinNopLen) != 0)
-    return false;
+  // Align the Count to 4 (or 2 if HasStdExtC) to avoid unaligned
+  // nop instruction
+  if (Count % MinNopLen)
+    OS.write_zeros(Count % MinNopLen);
 
   // The canonical nop on RISC-V is addi x0, x0, 0.
   for (; Count >= 4; Count -= 4)


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D114804.390729.patch
Type: text/x-patch
Size: 1231 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20211130/a77d961a/attachment.bin>