[PATCH] D113543: [RISCV] Add inline expansion for vector ftrunc/fceil/ffloor.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1642
+    // decrease by 1.
+    // FIXME: This should use a masked operation.
+    SDValue Adjust = DAG.getNode(ISD::FSUB, DL, VT, Truncated,
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rogfer01 wrote:
> I understand our current `RISCVISD::V<op>_VL` nodes fall short here because they don't allow mask undisturbed, right?
That or we need to pattern match fadd/fsub+vselect during isel. The other complexity is that if we use RISCVISD::V<op>_VL here, we have to convert fixed types to scalable in this function. Using target independent nodes avoided that.


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  https://reviews.llvm.org/D113543/new/

https://reviews.llvm.org/D113543