[PATCH] D113543: [RISCV] Add inline expansion for vector ftrunc/fceil/ffloor.

[Roger Ferrer Ibanez via Phabricator via llvm-commits]

rogfer01 added a comment.

Being myself far from an expert in floating-point, the logic and generated code seem correct to me.



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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1642
+    // decrease by 1.
+    // FIXME: This should use a masked operation.
+    SDValue Adjust = DAG.getNode(ISD::FSUB, DL, VT, Truncated,
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I understand our current `RISCVISD::V<op>_VL` nodes fall short here because they don't allow mask undisturbed, right?


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https://reviews.llvm.org/D113543