[PATCH] D112692: [RISCV] Generate pseudo instruction li

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added a comment.

Hm, this feels a bit weird due to li's special treatment, i.e. concerns about whether the disassembly would re-assemble to the same thing. For RVI/RVIC I think that's true, but I don't know if there's a risk that addi and some bitmanip instruction both work in context and we might end up favouring the bitmanip one upon re-assembling the li, though so long as we make sure a lone addi is preferred then that's not an issue (which is what binutils does; it has li aliases for all of c.lui, c.li and addi, with everything else then falling back on their M_LI macro implementation; you don't notice the first one in disassembly though because the lui alias appears before it in the opcodes table), and we already disassemble c.li as li so it's not a new risk. I agree it does also make the disassembly a bit more readable at a glance.

As a downstream it's annoying but automated so not too concerned about that.


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https://reviews.llvm.org/D112692