[PATCH] D112323: GlobalISel/Utils: Use incoming regbank while constraining the superclasses
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 22 10:00:28 PDT 2021
arsenm added a comment.
It's not accurate to say it would lead to incorrect codegen, we would just prefer to pick the classes beforehand rather than let the allocator decide until it needs to split live ranges
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Comment at: llvm/lib/CodeGen/GlobalISel/Utils.cpp:117
+ // not be overriden.
+ if (MRI.getRegBankOrNull(Reg) && RegClass) {
+ const TargetRegisterClass *RC =
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I'm not sure there's any case where this shoudl be called where MRI.getRegBankOrNull(Reg) can be null?
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Comment at: llvm/lib/CodeGen/GlobalISel/Utils.cpp:122
+ TRI.getCommonSubClass(RegClass, RC) == RC))
+ RegClass = RC;
+ }
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I would expect this to just directly assign getCommonSubClass's result without the comparison
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D112323/new/
https://reviews.llvm.org/D112323
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