[PATCH] D112323: GlobalISel/Utils: Use incoming regbank while constraining the superclasses
Christudasan Devadasan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 22 11:17:25 PDT 2021
cdevadas added a comment.
In D112323#3081078 <https://reviews.llvm.org/D112323#3081078>, @arsenm wrote:
> It's not accurate to say it would lead to incorrect codegen, we would just prefer to pick the classes beforehand rather than let the allocator decide until it needs to split live ranges
Yes, I was referring to the case when we fail to adjust the opcode for MOV/COPY to AV_* classes if we let regalloc to choose the register without fixing the class beforehand.
I will modify the description.
================
Comment at: llvm/lib/CodeGen/GlobalISel/Utils.cpp:117
+ // not be overriden.
+ if (MRI.getRegBankOrNull(Reg) && RegClass) {
+ const TargetRegisterClass *RC =
----------------
arsenm wrote:
> I'm not sure there's any case where this shoudl be called where MRI.getRegBankOrNull(Reg) can be null?
It's been called from SelectionDAG too.
================
Comment at: llvm/lib/CodeGen/GlobalISel/Utils.cpp:122
+ TRI.getCommonSubClass(RegClass, RC) == RC))
+ RegClass = RC;
+ }
----------------
arsenm wrote:
> I would expect this to just directly assign getCommonSubClass's result without the comparison
Will do.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D112323/new/
https://reviews.llvm.org/D112323
More information about the llvm-commits
mailing list