[PATCH] D112078: [AArch64][SVE] Add new ld<n> intrinsics that return a struct of vscale types

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 20 02:51:26 PDT 2021


paulwalker-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:3904
+      } else if (VT == MVT::nxv8i16 || VT == MVT::nxv8f16 ||
+                 (VT == MVT::nxv8bf16 && Subtarget->hasBF16())) {
+        SelectPredicatedLoad(Node, 2, 1, AArch64::LD2H_IMM, AArch64::LD2H,
----------------
david-arm wrote:
> CarolineConcatto wrote:
> > Just in case:
> > When I had to work with ld3 and make tests for it.
> > I needed  to change the ld to accept these types:
> >     2f16, 2b16
> >     4f16, 4bf16  and
> >     2f32 
> > Should these types be here too?
> I think that's a good question! It looks like the ACLE only defines versions of the intrinsics using the fully packed types, so perhaps we never expect to see unpacked types here?
That it correct.  The majority of the SVE intrinsics only care about packed vectors.  Although we've tried to declare them in such a way that they're largely element count agnostic, there is little support within the code generator for anything other than packed vectors.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D112078/new/

https://reviews.llvm.org/D112078



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