[llvm] cef0a69 - [X86][Costmodel] Load/store i64/f64 Stride=3 VF=16 interleaving costs
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 4 04:41:21 PDT 2021
Author: Roman Lebedev
Date: 2021-10-04T14:35:17+03:00
New Revision: cef0a693b6373764dc5483ef3b4523e68a812972
URL: https://github.com/llvm/llvm-project/commit/cef0a693b6373764dc5483ef3b4523e68a812972
DIFF: https://github.com/llvm/llvm-project/commit/cef0a693b6373764dc5483ef3b4523e68a812972.diff
LOG: [X86][Costmodel] Load/store i64/f64 Stride=3 VF=16 interleaving costs
This required huge amount of assembly surgery, but i think this is about right.
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
For load we have:
https://godbolt.org/z/z11crMEcj - for intels `Block RThroughput: =20.0`; for ryzens, `Block RThroughput: <=18.0`
So could pick cost of `25`.
For store we have:
https://godbolt.org/z/eqT4ze3j4 - for intels `Block RThroughput: =24.0`; for ryzens, `Block RThroughput: <=16.0`
So we could pick cost of `24`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D111031
Added:
Modified:
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll
llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-3.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-3.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index db5b4032cfa0..37fe25a5751f 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5114,6 +5114,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
{3, MVT::v2i64, 1}, // (load 6i64 and) deinterleave into 3 x 2i64
{3, MVT::v4i64, 5}, // (load 12i64 and) deinterleave into 3 x 4i64
{3, MVT::v8i64, 10}, // (load 24i64 and) deinterleave into 3 x 8i64
+ {3, MVT::v16i64, 20}, // (load 48i64 and) deinterleave into 3 x 16i64
{4, MVT::v2i8, 4}, // (load 8i8 and) deinterleave into 4 x 2i8
{4, MVT::v4i8, 4}, // (load 16i8 and) deinterleave into 4 x 4i8
@@ -5185,6 +5186,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
{3, MVT::v2i64, 4}, // interleave 3 x 2i64 into 6i64 (and store)
{3, MVT::v4i64, 6}, // interleave 3 x 4i64 into 12i64 (and store)
{3, MVT::v8i64, 12}, // interleave 3 x 8i64 into 24i64 (and store)
+ {3, MVT::v16i64, 24}, // interleave 3 x 16i64 into 48i64 (and store)
{4, MVT::v2i8, 4}, // interleave 4 x 2i8 into 8i8 (and store)
{4, MVT::v4i8, 4}, // interleave 4 x 4i8 into 16i8 (and store)
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll
index 4b1edbfbc2a1..58f2e99f4854 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll
@@ -27,7 +27,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 16 for VF 8 For instruction: %v0 = load double, double* %in0, align 8
-; AVX2: LV: Found an estimated cost of 96 for VF 16 For instruction: %v0 = load double, double* %in0, align 8
+; AVX2: LV: Found an estimated cost of 32 for VF 16 For instruction: %v0 = load double, double* %in0, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load double, double* %in0, align 8
; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction: %v0 = load double, double* %in0, align 8
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll
index fad4a8be74f1..6cb1b680f2fb 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll
@@ -27,7 +27,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 16 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8
-; AVX2: LV: Found an estimated cost of 156 for VF 16 For instruction: %v0 = load i64, i64* %in0, align 8
+; AVX2: LV: Found an estimated cost of 32 for VF 16 For instruction: %v0 = load i64, i64* %in0, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction: %v0 = load i64, i64* %in0, align 8
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-3.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-3.ll
index b8432206ad49..b0db33ad2505 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-3.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-3.ll
@@ -27,7 +27,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction: store double %v2, double* %out2, align 8
; AVX2: LV: Found an estimated cost of 9 for VF 4 For instruction: store double %v2, double* %out2, align 8
; AVX2: LV: Found an estimated cost of 18 for VF 8 For instruction: store double %v2, double* %out2, align 8
-; AVX2: LV: Found an estimated cost of 108 for VF 16 For instruction: store double %v2, double* %out2, align 8
+; AVX2: LV: Found an estimated cost of 36 for VF 16 For instruction: store double %v2, double* %out2, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store double %v2, double* %out2, align 8
; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction: store double %v2, double* %out2, align 8
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-3.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-3.ll
index 0f13e61ce47b..9510f31113a2 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-3.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-3.ll
@@ -27,7 +27,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction: store i64 %v2, i64* %out2, align 8
; AVX2: LV: Found an estimated cost of 9 for VF 4 For instruction: store i64 %v2, i64* %out2, align 8
; AVX2: LV: Found an estimated cost of 18 for VF 8 For instruction: store i64 %v2, i64* %out2, align 8
-; AVX2: LV: Found an estimated cost of 156 for VF 16 For instruction: store i64 %v2, i64* %out2, align 8
+; AVX2: LV: Found an estimated cost of 36 for VF 16 For instruction: store i64 %v2, i64* %out2, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store i64 %v2, i64* %out2, align 8
; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction: store i64 %v2, i64* %out2, align 8
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