[PATCH] D111019: [X86][Costmodel] Load/store i32/f32 Stride=3 VF=2 interleaving costs
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 4 04:41:21 PDT 2021
This revision was automatically updated to reflect the committed changes.
Closed by commit rG3e93fcdfc893: [X86][Costmodel] Load/store i32/f32 Stride=3 VF=2 interleaving costs (authored by lebedev.ri).
Changed prior to commit:
https://reviews.llvm.org/D111019?vs=376761&id=376862#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D111019/new/
https://reviews.llvm.org/D111019
Files:
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
Index: llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
@@ -24,7 +24,7 @@
; AVX1: LV: Found an estimated cost of 138 for VF 16 For instruction: store i32 %v2, i32* %out2, align 4
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i32 %v2, i32* %out2, align 4
-; AVX2: LV: Found an estimated cost of 18 for VF 2 For instruction: store i32 %v2, i32* %out2, align 4
+; AVX2: LV: Found an estimated cost of 7 for VF 2 For instruction: store i32 %v2, i32* %out2, align 4
; AVX2: LV: Found an estimated cost of 29 for VF 4 For instruction: store i32 %v2, i32* %out2, align 4
; AVX2: LV: Found an estimated cost of 69 for VF 8 For instruction: store i32 %v2, i32* %out2, align 4
; AVX2: LV: Found an estimated cost of 138 for VF 16 For instruction: store i32 %v2, i32* %out2, align 4
Index: llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
@@ -24,7 +24,7 @@
; AVX1: LV: Found an estimated cost of 114 for VF 16 For instruction: store float %v2, float* %out2, align 4
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store float %v2, float* %out2, align 4
-; AVX2: LV: Found an estimated cost of 13 for VF 2 For instruction: store float %v2, float* %out2, align 4
+; AVX2: LV: Found an estimated cost of 7 for VF 2 For instruction: store float %v2, float* %out2, align 4
; AVX2: LV: Found an estimated cost of 23 for VF 4 For instruction: store float %v2, float* %out2, align 4
; AVX2: LV: Found an estimated cost of 57 for VF 8 For instruction: store float %v2, float* %out2, align 4
; AVX2: LV: Found an estimated cost of 114 for VF 16 For instruction: store float %v2, float* %out2, align 4
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
@@ -24,7 +24,7 @@
; AVX1: LV: Found an estimated cost of 138 for VF 16 For instruction: %v0 = load i32, i32* %in0, align 4
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i32, i32* %in0, align 4
-; AVX2: LV: Found an estimated cost of 17 for VF 2 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction: %v0 = load i32, i32* %in0, align 4
; AVX2: LV: Found an estimated cost of 30 for VF 4 For instruction: %v0 = load i32, i32* %in0, align 4
; AVX2: LV: Found an estimated cost of 20 for VF 8 For instruction: %v0 = load i32, i32* %in0, align 4
; AVX2: LV: Found an estimated cost of 138 for VF 16 For instruction: %v0 = load i32, i32* %in0, align 4
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
@@ -24,7 +24,7 @@
; AVX1: LV: Found an estimated cost of 114 for VF 16 For instruction: %v0 = load float, float* %in0, align 4
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load float, float* %in0, align 4
-; AVX2: LV: Found an estimated cost of 12 for VF 2 For instruction: %v0 = load float, float* %in0, align 4
+; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction: %v0 = load float, float* %in0, align 4
; AVX2: LV: Found an estimated cost of 24 for VF 4 For instruction: %v0 = load float, float* %in0, align 4
; AVX2: LV: Found an estimated cost of 20 for VF 8 For instruction: %v0 = load float, float* %in0, align 4
; AVX2: LV: Found an estimated cost of 114 for VF 16 For instruction: %v0 = load float, float* %in0, align 4
Index: llvm/lib/Target/X86/X86TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5106,6 +5106,7 @@
{3, MVT::v16i16, 28}, // (load 48i16 and) deinterleave into 3 x 16i16
{3, MVT::v32i16, 56}, // (load 96i16 and) deinterleave into 3 x 32i16
+ {3, MVT::v2i32, 3}, // (load 6i32 and) deinterleave into 3 x 2i32
{3, MVT::v8i32, 17}, // (load 24i32 and) deinterleave into 3 x 8i32
{4, MVT::v2i8, 4}, // (load 8i8 and) deinterleave into 4 x 2i8
@@ -5170,6 +5171,8 @@
{3, MVT::v16i16, 27}, // interleave 3 x 16i16 into 48i16 (and store)
{3, MVT::v32i16, 54}, // interleave 3 x 32i16 into 96i16 (and store)
+ {3, MVT::v2i32, 4}, // interleave 3 x 2i32 into 6i32 (and store)
+
{4, MVT::v2i8, 4}, // interleave 4 x 2i8 into 8i8 (and store)
{4, MVT::v4i8, 4}, // interleave 4 x 4i8 into 16i8 (and store)
{4, MVT::v8i8, 4}, // interleave 4 x 8i8 into 32i8 (and store)
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