[PATCH] D111020: [X86][Costmodel] Load/store i32/f32 Stride=3 VF=4 interleaving costs

Mon Oct 4 04:41:24 PDT 2021

This revision was automatically updated to reflect the committed changes.
Closed by commit rGa93411c3afc7: [X86][Costmodel] Load/store i32/f32 Stride=3 VF=4 interleaving costs (authored by lebedev.ri).

Changed prior to commit:
  https://reviews.llvm.org/D111020?vs=376763&id=376863#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111020/new/

https://reviews.llvm.org/D111020

Files:
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll


Index: llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
===================================================================

--- llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
@@ -25,7 +25,7 @@
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i32 %v2, i32* %out2, align 4
 ; AVX2: LV: Found an estimated cost of 7 for VF 2 For instruction:   store i32 %v2, i32* %out2, align 4
-; AVX2: LV: Found an estimated cost of 29 for VF 4 For instruction:   store i32 %v2, i32* %out2, align 4
+; AVX2: LV: Found an estimated cost of 7 for VF 4 For instruction:   store i32 %v2, i32* %out2, align 4
 ; AVX2: LV: Found an estimated cost of 69 for VF 8 For instruction:   store i32 %v2, i32* %out2, align 4
 ; AVX2: LV: Found an estimated cost of 138 for VF 16 For instruction:   store i32 %v2, i32* %out2, align 4
 ;
Index: llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
@@ -25,7 +25,7 @@
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store float %v2, float* %out2, align 4
 ; AVX2: LV: Found an estimated cost of 7 for VF 2 For instruction:   store float %v2, float* %out2, align 4
-; AVX2: LV: Found an estimated cost of 23 for VF 4 For instruction:   store float %v2, float* %out2, align 4
+; AVX2: LV: Found an estimated cost of 7 for VF 4 For instruction:   store float %v2, float* %out2, align 4
 ; AVX2: LV: Found an estimated cost of 57 for VF 8 For instruction:   store float %v2, float* %out2, align 4
 ; AVX2: LV: Found an estimated cost of 114 for VF 16 For instruction:   store float %v2, float* %out2, align 4
 ;
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
@@ -25,7 +25,7 @@
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction:   %v0 = load i32, i32* %in0, align 4
-; AVX2: LV: Found an estimated cost of 30 for VF 4 For instruction:   %v0 = load i32, i32* %in0, align 4
+; AVX2: LV: Found an estimated cost of 5 for VF 4 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 20 for VF 8 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 138 for VF 16 For instruction:   %v0 = load i32, i32* %in0, align 4
 ;
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
@@ -25,7 +25,7 @@
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction:   %v0 = load float, float* %in0, align 4
-; AVX2: LV: Found an estimated cost of 24 for VF 4 For instruction:   %v0 = load float, float* %in0, align 4
+; AVX2: LV: Found an estimated cost of 5 for VF 4 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 20 for VF 8 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 114 for VF 16 For instruction:   %v0 = load float, float* %in0, align 4
 ;
Index: llvm/lib/Target/X86/X86TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5107,6 +5107,7 @@
       {3, MVT::v32i16, 56},  // (load 96i16 and) deinterleave into 3 x 32i16
 
       {3, MVT::v2i32, 3}, // (load 6i32 and) deinterleave into 3 x 2i32
+      {3, MVT::v4i32, 3}, // (load 12i32 and) deinterleave into 3 x 4i32
       {3, MVT::v8i32, 17}, // (load 24i32 and) deinterleave into 3 x 8i32
 
       {4, MVT::v2i8, 4},  // (load 8i8 and) deinterleave into 4 x 2i8
@@ -5172,6 +5173,7 @@
       {3, MVT::v32i16, 54},   // interleave 3 x 32i16 into 96i16 (and store)
 
       {3, MVT::v2i32, 4},   // interleave 3 x 2i32 into 6i32 (and store)
+      {3, MVT::v4i32, 5},   // interleave 3 x 4i32 into 12i32 (and store)
 
       {4, MVT::v2i8, 4},  // interleave 4 x 2i8 into 8i8 (and store)
       {4, MVT::v4i8, 4},   // interleave 4 x 4i8 into 16i8 (and store)


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