[llvm] b2b1a8b - [LiveIntervals] Improve repair after convertToThreeAddress
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 28 00:20:42 PDT 2021
Author: Jay Foad
Date: 2021-09-28T08:10:08+01:00
New Revision: b2b1a8b833905e159fe445ba1d0baae427a118cc
URL: https://github.com/llvm/llvm-project/commit/b2b1a8b833905e159fe445ba1d0baae427a118cc
DIFF: https://github.com/llvm/llvm-project/commit/b2b1a8b833905e159fe445ba1d0baae427a118cc.diff
LOG: [LiveIntervals] Improve repair after convertToThreeAddress
After TwoAddressInstructionPass calls
TargetInstrInfo::convertToThreeAddress, improve the LiveIntervals repair
to cope with convertToThreeAddress creating more than one new
instruction.
This mostly seems to benefit X86. For example in
test/CodeGen/X86/zext-trunc.ll it converts:
%4:gr32 = ADD32rr %3:gr32(tied-def 0), %2:gr32, implicit-def dead $eflags
to:
undef %6.sub_32bit:gr64 = COPY %3:gr32
undef %7.sub_32bit:gr64_nosp = COPY %2:gr32
%4:gr32 = LEA64_32r killed %6:gr64, 1, killed %7:gr64_nosp, 0, $noreg
Differential Revision: https://reviews.llvm.org/D110335
Added:
Modified:
llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
llvm/test/CodeGen/X86/zext-trunc.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
index 3e2e6c9fd7823..74a4f7dc1f636 100644
--- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -590,6 +590,7 @@ bool TwoAddressInstructionPass::isProfitableToConv3Addr(Register RegA,
bool TwoAddressInstructionPass::convertInstTo3Addr(
MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi,
Register RegA, Register RegB, unsigned Dist) {
+ MachineInstrSpan MIS(mi, MBB);
MachineInstr *NewMI = TII->convertToThreeAddress(*mi, LV);
if (!NewMI)
return false;
@@ -597,9 +598,6 @@ bool TwoAddressInstructionPass::convertInstTo3Addr(
LLVM_DEBUG(dbgs() << "2addr: CONVERTING 2-ADDR: " << *mi);
LLVM_DEBUG(dbgs() << "2addr: TO 3-ADDR: " << *NewMI);
- if (LIS)
- LIS->ReplaceMachineInstrInMaps(*mi, *NewMI);
-
// If the old instruction is debug value tracked, an update is required.
if (auto OldInstrNum = mi->peekDebugInstrNum()) {
// Sanity check.
@@ -618,8 +616,26 @@ bool TwoAddressInstructionPass::convertInstTo3Addr(
std::make_pair(NewInstrNum, NewIdx));
}
+ // If convertToThreeAddress created a single new instruction, assume it has
+ // exactly the same effect on liveness as the old instruction. This is much
+ // more efficient than calling repairIntervalsInRange.
+ bool SingleInst = std::next(MIS.begin(), 2) == MIS.end();
+ if (LIS && SingleInst)
+ LIS->ReplaceMachineInstrInMaps(*mi, *NewMI);
+
+ SmallVector<Register> OrigRegs;
+ if (LIS && !SingleInst) {
+ for (const MachineOperand &MO : mi->operands()) {
+ if (MO.isReg())
+ OrigRegs.push_back(MO.getReg());
+ }
+ }
+
MBB->erase(mi); // Nuke the old inst.
+ if (LIS && !SingleInst)
+ LIS->repairIntervalsInRange(MBB, MIS.begin(), MIS.end(), OrigRegs);
+
DistanceMap.insert(std::make_pair(NewMI, Dist));
mi = NewMI;
nmi = std::next(mi);
diff --git a/llvm/test/CodeGen/X86/zext-trunc.ll b/llvm/test/CodeGen/X86/zext-trunc.ll
index 2052f7bcd6a0a..d0d669a40fa35 100644
--- a/llvm/test/CodeGen/X86/zext-trunc.ll
+++ b/llvm/test/CodeGen/X86/zext-trunc.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -early-live-intervals -verify-machineinstrs | FileCheck %s
; rdar://7570931
define i64 @foo(i64 %a, i64 %b) nounwind {
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