[llvm] 20c0280 - [LiveIntervals] Repair subreg ranges in processTiedPairs

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2021-09-28T08:10:16+01:00
New Revision: 20c02807333a47000879e0f673cdf2d6b07148dd

URL: https://github.com/llvm/llvm-project/commit/20c02807333a47000879e0f673cdf2d6b07148dd
DIFF: https://github.com/llvm/llvm-project/commit/20c02807333a47000879e0f673cdf2d6b07148dd.diff

LOG: [LiveIntervals] Repair subreg ranges in processTiedPairs

In TwoAddressInstructionPass::processTiedPairs, update subranges of the
live interval for RegB as well as the main range.

This is a small step towards switching TwoAddressInstructionPass over
from LiveVariables to LiveIntervals. Currently this path is only tested
if you explicitly enable -early-live-intervals.

Differential Revision: https://reviews.llvm.org/D110526

Added: 
    

Modified: 
    llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
    llvm/test/CodeGen/Hexagon/swp-vect-dotprod.ll
    llvm/test/CodeGen/SystemZ/subregliveness-01.ll
    llvm/test/CodeGen/Thumb2/mve-multivec-spill.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
index 74a4f7dc1f636..a59c5b4d35cff 100644
--- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -1453,6 +1453,10 @@ TwoAddressInstructionPass::processTiedPairs(MachineInstr *MI,
         SlotIndex endIdx =
             LIS->getInstructionIndex(*MI).getRegSlot(IsEarlyClobber);
         LI.addSegment(LiveInterval::Segment(LastCopyIdx, endIdx, VNI));
+        for (auto &S : LI.subranges()) {
+          VNI = S.getNextValue(LastCopyIdx, LIS->getVNInfoAllocator());
+          S.addSegment(LiveInterval::Segment(LastCopyIdx, endIdx, VNI));
+        }
       }
     }
 

diff  --git a/llvm/test/CodeGen/Hexagon/swp-vect-dotprod.ll b/llvm/test/CodeGen/Hexagon/swp-vect-dotprod.ll
index 4bd1a513429f0..1d675c8664f4a 100644
--- a/llvm/test/CodeGen/Hexagon/swp-vect-dotprod.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-vect-dotprod.ll
@@ -1,6 +1,7 @@
 ; RUN: llc -march=hexagon -mcpu=hexagonv5 -enable-pipeliner < %s -pipeliner-experimental-cg=true | FileCheck %s
 ; RUN: llc -march=hexagon -mcpu=hexagonv5 -O2 < %s -pipeliner-experimental-cg=true | FileCheck %s
 ; RUN: llc -march=hexagon -mcpu=hexagonv5 -O3 < %s -pipeliner-experimental-cg=true | FileCheck %s
+; RUN: llc -march=hexagon -mcpu=hexagonv5 -enable-pipeliner < %s -pipeliner-experimental-cg=true -early-live-intervals -verify-machineinstrs | FileCheck %s
 ;
 ; Check that we pipeline a vectorized dot product in a single packet.
 ;

diff  --git a/llvm/test/CodeGen/SystemZ/subregliveness-01.ll b/llvm/test/CodeGen/SystemZ/subregliveness-01.ll
index 83a357900c395..7e76469207d02 100644
--- a/llvm/test/CodeGen/SystemZ/subregliveness-01.ll
+++ b/llvm/test/CodeGen/SystemZ/subregliveness-01.ll
@@ -1,4 +1,5 @@
 ; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs -systemz-subreg-liveness < %s | FileCheck %s
+; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs -systemz-subreg-liveness -early-live-intervals < %s | FileCheck %s
 
 ; Check for successful compilation.
 ; CHECK: lgfrl %r0, g_399

diff  --git a/llvm/test/CodeGen/Thumb2/mve-multivec-spill.ll b/llvm/test/CodeGen/Thumb2/mve-multivec-spill.ll
index 1574263c1d1e5..cab8991d31b93 100644
--- a/llvm/test/CodeGen/Thumb2/mve-multivec-spill.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-multivec-spill.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -O3 -mattr=+mve %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -O3 -mattr=+mve -early-live-intervals -verify-machineinstrs %s -o - | FileCheck %s
 
 declare void @external_function()