[PATCH] D109665: [AArch64][SVE] Add patterns to generate ADR instruction

[Usman Nadeem via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG645b8f5365de: [AArch64][SVE] Add patterns to generate ADR instruction (authored by mnadeem).

Changed prior to commit:
  https://reviews.llvm.org/D109665?vs=373377&id=374058#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109665/new/

https://reviews.llvm.org/D109665

Files:
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/test/CodeGen/AArch64/sve-adr.ll
  llvm/test/CodeGen/AArch64/sve-gep.ll

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