[PATCH] D109754: AMDGPU: Use -1/0 when copying from SCC to SGPR

Ruiling, Song via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 16 08:15:00 PDT 2021


ruiling added a comment.

I think the cause of the issue is that in GlobalISel we are defining the `COPY from SCC to SGPR` as `select 0/1 based on SCC`, But in SelectionDAG, the `COPY from SCC to SGPR` means `select 0/-1 based on SCC`. And both paths will have some of such copies to be lowered in `copyPhysReg()`. I have lowered the copy earlier in D109889 <https://reviews.llvm.org/D109889>.


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  https://reviews.llvm.org/D109754/new/

https://reviews.llvm.org/D109754



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