[PATCH] D109754: AMDGPU: Use -1/0 when copying from SCC to SGPR

Tue Sep 14 07:29:13 PDT 2021

ruiling added a comment.

In D109754#2999492 <https://reviews.llvm.org/D109754#2999492>, @arsenm wrote:

> In D109754#2999491 <https://reviews.llvm.org/D109754#2999491>, @arsenm wrote:
>
>> In D109754#2999478 <https://reviews.llvm.org/D109754#2999478>, @piotr wrote:
>>
>>> The change makes sense to me in general.
>>>
>>> When I tried doing the same long time ago, Matt rightly pointed out (https://reviews.llvm.org/D81925#inline-753225) that sign extending does not correspond to the booleans being defined as zero extended. So, wouldn't your change also require an accompanying change of boolean contents to ZeroOrNegativeOneBooleanContent instead of ZeroOrOneBooleanContent in SIISelLowering.cpp?
>>
>> No, because this is producing a mask and not really an extended value
>
> Well in this context it's ambiguous since we don't know what the destination register is used for. I think this is a problem earlier in the flow

Would you like to talk a little more about the ambiguity in your mind? Sounds like you want the COPY to be dedicated for one of the ambiguous situations.

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  https://reviews.llvm.org/D109754/new/

https://reviews.llvm.org/D109754