[PATCH] D108961: [RISCV] MC relaxation for out-of-range conditional branch.

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added a comment.

In D108961#3003855 <https://reviews.llvm.org/D108961#3003855>, @StephenFan wrote:

> I found some pseudo instruction are expanded to multiple MI instructions in `RISCVExpandPseudoInsts.cpp`. And the BranchRelaxation pass will run before the expandPseudo pass. Is it possible to cause the fixup value out-of-range on some branch instructions? If this will happen, maybe add MC layer branch relaxation can deal with it.

Not unless RISCVInstrInfo::getInstSizeInBytes has missing or incorrect cases.


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https://reviews.llvm.org/D108961