[PATCH] D108961: [RISCV] MC relaxation for out-of-range conditional branch.

[luxufan via Phabricator via llvm-commits]

StephenFan added a comment.

I found some pseudo instruction are expanded to multiple MI instructions in `RISCVExpandPseudoInsts.cpp`. And the BranchRelaxation pass will run before the expandPseudo pass. Is it possible to cause the fixup value out-of-range on some branch instructions? If this will happen, maybe add MC layer branch relaxation can deal with it.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D108961/new/

https://reviews.llvm.org/D108961