[PATCH] D105659: [PowerPC][AIX] Support ByVals with greater alignment then pointer size

[Zarko Todorovski via Phabricator via llvm-commits]

ZarkoCA updated this revision to Diff 373011.
ZarkoCA added a comment.

Fixed test cases that were failing due to changed in expected ouput:

- store/load 4/8 is now store/load (s32/s64)
- `undef` is now `undefined-address`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105659/new/

https://reviews.llvm.org/D105659

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation3.ll
  llvm/test/CodeGen/PowerPC/aix-vector-byval-callee.ll
  llvm/test/CodeGen/PowerPC/aix-vector-byval.ll

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