[PATCH] D109074: [Codegen][TLI][X86] SimplifyMultipleUseDemandedBits(): 0'th vec subreg widening is free, try to perform it earlier

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri updated this revision to Diff 369995.
lebedev.ri added a comment.

Don't try to change `DemandedBits` width - this can't change elt width. NFC.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109074/new/

https://reviews.llvm.org/D109074

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AArch64/vecreduce-and-legalization.ll
  llvm/test/CodeGen/X86/avg.ll
  llvm/test/CodeGen/X86/horizontal-sum.ll

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