[PATCH] D107160: [AArch64] Do not emit an extra zero-extend for i1 argument

[Andrew Savonichev via Phabricator via llvm-commits]

asavonic added a comment.

In D107160#2961436 <https://reviews.llvm.org/D107160#2961436>, @efriedma wrote:

> This turned out much messier than I was hoping for...
>
> I guess we have the following possibilities:
>
> 1. Go back to the original patch.
> 2. Go with something like this approach, maybe with a few small cleanups.
> 3. Try to use target-specific nodes to dodge the legalization issues.  Instead of using the target-independent nodes, introduce AArch64ISD::AssertZextBool/AArch64::ZERO_EXTEND_BOOL which have an i32 argument/result, and then DAGCombine them away after type legalization cleans up all the extend/truncate ops which make this harder to analyze.  Maybe more code, but easier to understand the implications, I think.

Thanks a lot! I decided to try the option 3, and it seems to work fine.

> You might want to add a testcase where the call isn't in the entry block; I think maybe the original patch handles this?

This case does not work well with SelectionDAG - the hint and the call are in different blocks, and thus not visible.
I noticed that `zeroext` flag is propagated correctly between blocks, so we might be able to do the same for the assertion.
I guess that ideally we need to propagate known bits instead, but I'm not sure if it is possible to do this.


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