[PATCH] D107160: [AArch64] Do not emit an extra zero-extend for i1 argument

[Andrew Savonichev via Phabricator via llvm-commits]

asavonic updated this revision to Diff 369430.
asavonic edited the summary of this revision.
asavonic added a comment.

Added AArch64ISD::ASSERT_ZEXT_BOOL opcode to avoid legalization issues with AssertZExt.
Added a test case with a call not in the entry block.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D107160/new/

https://reviews.llvm.org/D107160

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
  llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-signext.ll
  llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
  llvm/test/CodeGen/AArch64/arm64-aapcs.ll
  llvm/test/CodeGen/AArch64/i1-contents.ll

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