[PATCH] D108663: [RISCV] Insert a sext_inreg when type legalizing i32 shl by constant on RV64.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

I've posted D108738 <https://reviews.llvm.org/D108738> to make bitreverse expansion more efficient out of the box. That should prevent the regressions here.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108663/new/

https://reviews.llvm.org/D108663