[PATCH] D108701: [X86][SchedModel] Fix latency of the Hi register write of MULX (PR51495).

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb added inline comments.


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Comment at: llvm/lib/Target/X86/X86SchedBroadwell.td:162
+  let Latency = !add(BWWriteIMulH.Latency, BroadwellModel.LoadLatency);
+}
+
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RKSimon wrote:
> please can you move this back up - I'm trying to reduce the diffs between this + haswell at the moment
No problem. I will move it back up before committing the patch. Thanks!


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https://reviews.llvm.org/D108701