[PATCH] D108701: [X86][SchedModel] Fix latency of the Hi register write of MULX (PR51495).

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon accepted this revision.
RKSimon added a comment.

LGTM with one minor



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Comment at: llvm/lib/Target/X86/X86SchedBroadwell.td:162
+  let Latency = !add(BWWriteIMulH.Latency, BroadwellModel.LoadLatency);
+}
+
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please can you move this back up - I'm trying to reduce the diffs between this + haswell at the moment


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