[PATCH] D108597: [M68k][AsmParser] Support parsing register masks & fix printing them

[Min-Yih Hsu via Phabricator via llvm-commits]

myhsu added a comment.

I just found that bits in the move mask will be inverted if the destination operand is predecrement mode address (i.e. -(An)). But we're not even supporting that addressing mode for MOVEM yet so I think it's fine for now.


Repository:
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  https://reviews.llvm.org/D108597/new/

https://reviews.llvm.org/D108597