[PATCH] D108597: [M68k][AsmParser] Support parsing register masks & fix printing them

[Min-Yih Hsu via Phabricator via llvm-commits]

myhsu added a comment.

Thanks for your swift response on adding move mask support!
overall LGTM. Please address the inline feedbacks.



================
Comment at: llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp:240
+static inline unsigned getRegisterIndex(unsigned Register) {
+  switch (Register) {
+  case M68k::D0:
----------------
I think `A0` ~ `A7` as well as `D0` ~ `D7` are always contiguous (see M68kGenRegisterInfo.inc). So maybe this can be replaced with something like
```
if (Register >= M68k::D0 && Register <= M68k::D7)
  return Register - M68k::D0;
if (Register >= M68k::A0 && Register <= M68k::A7)
  return Register - M68k::A0 + 8;
// Here: handle SP, PC, CCR...
```


================
Comment at: llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp:279
+  default:
+    assert(false && "unexpected register number");
+    return 0;
----------------



================
Comment at: llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp:379
+bool M68kOperand::isMoveMask() const {
+  if (!isMemOp()) {
+    return false;
----------------
(formatting) remove surrounding braces for single-line if-statement


================
Comment at: llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp:383
+
+  if (MemOp.Op == M68kMemOp::Kind::RegMask) {
+    return true;
----------------
ditto remove braces and other places below


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https://reviews.llvm.org/D108597