[PATCH] D108597: [M68k][AsmParser] Support parsing register masks & fix printing them

Ricky Taylor via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 24 02:06:57 PDT 2021


ricky26 added a comment.

In D108597#2961714 <https://reviews.llvm.org/D108597#2961714>, @myhsu wrote:

> I just found that bits in the move mask will be inverted if the destination operand is predecrement mode address (i.e. -(An)). But we're not even supporting that addressing mode for MOVEM yet so I think it's fine for now.

I guess I should've called this out in the commit message, but yes. I did have a quick look and I didn't see anything for the other side of the flip (i.e. during codegen / printing) so it seems unlikely to not get caught at the point that gets implemented.


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