[PATCH] D108091: [AggressiveInstCombine] Add shift left instruction to `TruncInstCombine` DAG

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added inline comments.


================
Comment at: llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp:113-115
+        MinBitWidth = KnownRHS.getMaxValue().getZExtValue();
+        if (MinBitWidth != std::numeric_limits<unsigned>::max())
+          MinBitWidth++;
----------------



================
Comment at: llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp:381-383
+      // `shl nsw` is more poisonous if bitwidth is smaller.
+      if (Opc == Instruction::Shl)
+        cast<Instruction>(Res)->setHasNoUnsignedWrap(I->hasNoUnsignedWrap());
----------------
This doesn't sound right?
https://alive2.llvm.org/ce/z/DMaieM

We drop no-wrap flags on all other instructions here, let's just not bother?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108091/new/

https://reviews.llvm.org/D108091