[PATCH] D107406: [DAGCombiner][TLI] SimplifySetCC(): recanonicalize `(X&1) != 0` (PR51312)
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 3 16:28:51 PDT 2021
lebedev.ri marked an inline comment as done.
lebedev.ri added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:3875
+ // If this is (X&1) == / != 1, normalize it to (X&1) != / == 0.
+ // If this is (X&1) != 0, renormalize it to (X&1) != 0.
+ SDValue OrigOp0 = Op0;
----------------
craig.topper wrote:
> Does this renormalize only happen if VT doesn't match Op0.getValueType()?
Yes, and i've guarded against infinite looping via `if (N1C->isOne() || Op0 != OrigOp0) {`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D107406/new/
https://reviews.llvm.org/D107406
More information about the llvm-commits
mailing list