[PATCH] D106651: [RISCV] Add support for vector saturating add/sub operations

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added a comment.

In D106651#2903878 <https://reviews.llvm.org/D106651#2903878>, @frasercrmck wrote:

> I don't believe we expose access to CSRs via intrinsics.

__builtin_readcyclecounter does already


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