[PATCH] D106139: [AMDGPU] Combine srl of add that intends to get the carry of the add as addcarry

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D106139#2882817 <https://reviews.llvm.org/D106139#2882817>, @abinavpp wrote:

> Even though this patch reduces the number of adds in the added combine-srl-add.ll test, it introduces a copy from vcc_hi. I.e. we get:
> v_add_co_u32_e32 v0, vcc, v0, v1
> v_mov_b32_e32 v1, vcc_hi
> v_add_co_u32_e32 v0, vcc, vcc_lo, v2
> v_addc_co_u32_e32 v1, vcc, v3, v1, vcc
>
> The problem is that:
> %7:vgpr_32, %8:sreg_64 = V_ADD_CO_U32_e64 %0:vgpr_32, %1:vgpr_32, 0, implicit $exec
> %9:vreg_64 = V_ADD_U64_PSEUDO killed %13:vreg_64, killed %8:sreg_64, implicit-def dead $vcc, implicit-def dead $exec, implicit $exec
>
> after finalize-isel becomes:
> %7:vgpr_32, %8:sreg_64 = V_ADD_CO_U32_e64 %0:vgpr_32, %1:vgpr_32, 0, implicit $exec
> %18:vgpr_32 = COPY %13.sub0:vreg_64
> %19:sgpr_32 = COPY %8.sub0:sreg_64
> %20:vgpr_32 = COPY %13.sub1:vreg_64
> %21:sgpr_32 = COPY %8.sub1:sreg_64
> %14:vgpr_32, %16:sreg_64_xexec = V_ADD_CO_U32_e64 %18:vgpr_32, %19:sgpr_32, 0, implicit $exec
>
> `%21:sgpr_32 = COPY %8.sub1:sreg_64` is created by adding `SrcReg1Sub1` to the MachineInstr `HiHalf` in the expansion of `V_ADD_U64_PSEUDO` in SITargetLowering::EmitInstrWithCustomInserter(). This is responsible for the vcc_hi copy. How can we eliminate the copy correctly? I only found clumsy ways to do this :(

This isn't a correct expansion. You cannot interpret the carry out directly as the source. This needs a v_cndmask_b32 to get a vector source


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