[PATCH] D106139: [AMDGPU] Combine srl of add that intends to get the carry of the add as addcarry

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:3256
+
+  if (!(N1C = dyn_cast<ConstantSDNode>(N1)))
+    return SDValue();
----------------
Just initialize above and avoid the weird !(=


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:3262-3263
+
+  if (N0.getOpcode() != ISD::ADD)
+    return SDValue();
+
----------------
Move this check first


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:3285-3286
+
+  // Make sure that the users of `N0` is not expecting the zero-extended type
+  for (SDNode *U : N0->uses()) {
+    if (U == N)
----------------
I don't understand why you are looking at the uses, you probably should just  skip this if !N0.hasOnEUse


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106139/new/

https://reviews.llvm.org/D106139