[PATCH] D105769: [RISCV] Use DIVUW/REMUW/DIVW instructions for i8/i16/i32 udiv/urem/sdiv when LHS is constant.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 13 10:34:28 PDT 2021
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG1e670dc7d784: [RISCV] Use DIVUW/REMUW/DIVW instructions for i8/i16/i32 udiv/urem/sdiv when… (authored by craig.topper).
Changed prior to commit:
https://reviews.llvm.org/D105769?vs=357774&id=358340#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105769/new/
https://reviews.llvm.org/D105769
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/div.ll
llvm/test/CodeGen/RISCV/rem.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D105769.358340.patch
Type: text/x-patch
Size: 6148 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210713/df285078/attachment.bin>
More information about the llvm-commits
mailing list