[PATCH] D105417: [RISCV] Teach RISCVMatInt about cases where it can use LUI+SLLI to replace LUI+ADDI+SLLI for large constants.

ShihPo Hung via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 13 02:03:38 PDT 2021

Previous message: [PATCH] D105769: [RISCV] Use DIVUW/REMUW/DIVW instructions for i8/i16/i32 udiv/urem/sdiv when LHS is constant.
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arcbbb accepted this revision.
arcbbb added a comment.
This revision is now accepted and ready to land.

LGTM


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D105417/new/

https://reviews.llvm.org/D105417

Previous message: [PATCH] D105769: [RISCV] Use DIVUW/REMUW/DIVW instructions for i8/i16/i32 udiv/urem/sdiv when LHS is constant.
Next message: [PATCH] D105417: [RISCV] Teach RISCVMatInt about cases where it can use LUI+SLLI to replace LUI+ADDI+SLLI for large constants.
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