[PATCH] D105875: [RISCV] Prevent use of t0(aka x5) as rs1 for jalr instructions.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 13 09:46:01 PDT 2021
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:1006
+def PseudoBRIND : Pseudo<(outs), (ins GPRJALR:$rs1, simm12:$imm12), []>,
PseudoInstExpansion<(JALR X0, GPR:$rs1, simm12:$imm12)>;
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jrtc27 wrote:
> This is one part of TableGen that I've never quite understood the rules about, but: does the expansion also need to use GPRJALR? (ditto for PseudoCALLIndirect)
I'm not sure. I matched what was already being done for PseudoTAILIndirect which used GPRTC for the ins and the isel pattern, but used GPR for the PseudoInstExpansion.
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CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105875/new/
https://reviews.llvm.org/D105875
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