[PATCH] D95588: [RISCV] Implement the MC layer support of P extension
Jim Lin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 12 22:38:52 PDT 2021
Jim updated this revision to Diff 358159.
Jim added a comment.
Address comments.
1. Add alias for MULSR64 and KMAR64
2. Fix instr format for INSB.
3. Add new GPRPairOpOperand and implement parseGPRPairReg to report the need for an even register.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95588/new/
https://reviews.llvm.org/D95588
Files:
clang/lib/Basic/Targets/RISCV.cpp
clang/lib/Basic/Targets/RISCV.h
clang/lib/Driver/ToolChains/Arch/RISCV.cpp
clang/test/Driver/riscv-arch.c
clang/test/Preprocessor/riscv-target-features.c
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
llvm/lib/Target/RISCV/RISCV.td
llvm/lib/Target/RISCV/RISCVInstrFormats.td
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
llvm/lib/Target/RISCV/RISCVInstrInfo.td
llvm/lib/Target/RISCV/RISCVInstrInfoP.td
llvm/lib/Target/RISCV/RISCVRegisterInfo.td
llvm/lib/Target/RISCV/RISCVSubtarget.h
llvm/lib/Target/RISCV/RISCVSystemOperands.td
llvm/test/MC/RISCV/rv32zpn-invalid.s
llvm/test/MC/RISCV/rv32zpsfoperand-invalid.s
llvm/test/MC/RISCV/rv32zpsfoperand-valid.s
llvm/test/MC/RISCV/rv64zpn-invalid.s
llvm/test/MC/RISCV/rv64zprvsfextra-invalid.s
llvm/test/MC/RISCV/rv64zprvsfextra-valid.s
llvm/test/MC/RISCV/rv64zpsfoperand-invalid.s
llvm/test/MC/RISCV/rv64zpsfoperand-valid.s
llvm/test/MC/RISCV/rvp-non-simd-valid.s
llvm/test/MC/RISCV/rvp-partial-simd-valid.s
llvm/test/MC/RISCV/rvp-simd-alu-valid.s
llvm/test/MC/RISCV/rvp-simd-cmp-valid.s
llvm/test/MC/RISCV/rvp-simd-misc-valid.s
llvm/test/MC/RISCV/rvp-simd-mul-valid.s
llvm/test/MC/RISCV/rvp-simd-shift-valid.s
llvm/test/MC/RISCV/rvp-simd-unpacking-valid.s
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