[PATCH] D105617: [PowerPC] Fix addi-load bias scheduling heuristics
Jinsong Ji via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 9 11:34:46 PDT 2021
jsji added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCMachineScheduler.cpp:27
+ Cand.SU->getInstr()->getOpcode() == PPC::ADDI8 ||
+ Cand.SU->getInstr()->getOpcode() == PPC::LI ||
+ Cand.SU->getInstr()->getOpcode() == PPC::LI8;
----------------
This heuristics was intended for the addi in loop induction variable calculation, not for all addi.
So `LI/LI8` shouldn't be counted.
Do you have any specific example that we have LI/LI8 in loop and should schedule them earlier?
================
Comment at: llvm/lib/Target/PowerPC/PPCMachineScheduler.cpp:173
- if (isADDIInstr(TryCand) && !isADDIInstr(Cand)) {
- TryCand.Reason = Stall;
- return true;
+ if (tryGreater(isADDIInstr(TryCand) && Cand.SU->getInstr()->mayLoad(),
+ isADDIInstr(Cand) && TryCand.SU->getInstr()->mayLoad(),
----------------
The heuristics was to try to schedule addi as early as possible, not necessary just before mayload instructions.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105617/new/
https://reviews.llvm.org/D105617
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