[PATCH] D104471: [llvm][sve] Lowering for VLS truncating stores
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 1 12:53:26 PDT 2021
efriedma added a reviewer: arsenm.
efriedma added a comment.
Herald added a subscriber: wdng.
For MIPS, it looks like we're somehow eliminating zero-extension operations which aren't getting eliminated otherwise. Not sure why we don't manage to perform the transform otherwise, but seems fine. Actually, maybe this is an argument for generating truncstores even more aggressively than your patch; in theory, before operation legalization, we could do the transform even if it's "expand".
For R600, it looks like combining to a truncstore blocks an important target-specific DAGCombine; the combines don't support loadext/truncstore. See AMDGPUTargetLowering::shouldCombineMemoryType. You could try to fix the target-specific combines, or just add a target hook, I guess.
================
Comment at: llvm/include/llvm/CodeGen/TargetLowering.h:1269
/// target.
- bool isTruncStoreLegalOrCustom(EVT ValVT, EVT MemVT) const {
+ virtual bool isTruncStoreLegalOrCustom(EVT ValVT, EVT MemVT) const {
return isTypeLegal(ValVT) &&
----------------
If you're going to add a target hook for this, please make it a separate function from isTruncStoreLegalOrCustom, so it's clear what it's doing.
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https://reviews.llvm.org/D104471/new/
https://reviews.llvm.org/D104471
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