[PATCH] D105110: [AArch64] Fix for custom lowering <4 x i8> loads

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/aarch64-load-ext.ll:288
+; CHECK-LE-NEXT:    str w0, [sp, #12]
 ; CHECK-LE-NEXT:    ldr s0, [sp, #12]
 ; CHECK-LE-NEXT:    ushll v0.8h, v0.8b, #0
----------------
I think we could legalise a v4i8 bitcast in a different way, but that's for another day.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105110/new/

https://reviews.llvm.org/D105110