[PATCH] D105110: [AArch64] Fix for custom lowering <4 x i8> loads

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer created this revision.
SjoerdMeijer added reviewers: dmgreen, efriedma.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
SjoerdMeijer requested review of this revision.
Herald added a project: LLVM.

This is a follow up D104782 <https://reviews.llvm.org/D104782> that I reverted because of a failure in the llvm test suite. This is a diff against my local repo where I have first recommitted that again, just for clarity to only show this change.

The miscompile is made visible with a Bitcast node, that is lowered to a Store followed by a Load. The new Load instruction got the wrong operand (the DAG entry), so that the store instruction was no longer connected and removed.


https://reviews.llvm.org/D105110

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/aarch64-load-ext.ll


Index: llvm/test/CodeGen/AArch64/aarch64-load-ext.ll
===================================================================
--- llvm/test/CodeGen/AArch64/aarch64-load-ext.ll
+++ llvm/test/CodeGen/AArch64/aarch64-load-ext.ll
@@ -284,6 +284,7 @@
 ; CHECK-LE:       // %bb.0:
 ; CHECK-LE-NEXT:    sub sp, sp, #16 // =16
 ; CHECK-LE-NEXT:    .cfi_def_cfa_offset 16
+; CHECK-LE-NEXT:    str w0, [sp, #12]
 ; CHECK-LE-NEXT:    ldr s0, [sp, #12]
 ; CHECK-LE-NEXT:    ushll v0.8h, v0.8b, #0
 ; CHECK-LE-NEXT:    // kill: def $d0 killed $d0 killed $q0
@@ -294,6 +295,7 @@
 ; CHECK-BE:       // %bb.0:
 ; CHECK-BE-NEXT:    sub sp, sp, #16 // =16
 ; CHECK-BE-NEXT:    .cfi_def_cfa_offset 16
+; CHECK-BE-NEXT:    str w0, [sp, #12]
 ; CHECK-BE-NEXT:    ldr s0, [sp, #12]
 ; CHECK-BE-NEXT:    rev32 v0.8b, v0.8b
 ; CHECK-BE-NEXT:    ushll v0.8h, v0.8b, #0
Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -4504,7 +4504,7 @@
   else
     return SDValue();
 
-  SDValue Load = DAG.getLoad(MVT::f32, DL, DAG.getEntryNode(),
+  SDValue Load = DAG.getLoad(MVT::f32, DL, Op.getOperand(0),
                              LoadNode->getBasePtr(), MachinePointerInfo());
   SDValue Chain = Load.getValue(1);
   SDValue Vec = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, MVT::v2f32, Load);


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