[PATCH] D105016: [TargetLowering][AArch64][SVE] Take into account accessed type when clamping address

[Bradley Smith via Phabricator via llvm-commits]

bsmith updated this revision to Diff 354890.
bsmith marked 2 inline comments as done.
bsmith added a comment.

- Rearrange if statement to clarify intent
- Construct 1-element vector in `getVectorElementPointer` to avoid special cases


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105016/new/

https://reviews.llvm.org/D105016

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AArch64/split-vector-insert.ll
  llvm/test/CodeGen/AArch64/sve-extract-vector.ll
  llvm/test/CodeGen/AArch64/sve-insert-vector.ll

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