[PATCH] D105016: [TargetLowering][AArch64][SVE] Take into account accessed type when clamping address
Bradley Smith via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 28 07:05:00 PDT 2021
bsmith added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:7796
if (auto *IdxCst = dyn_cast<ConstantSDNode>(Idx))
- if (IdxCst->getZExtValue() < NElts)
+ if (IdxCst->getZExtValue() + NumSubElts <= NElts)
return Idx;
----------------
peterwaller-arm wrote:
> Question: Shouldn't this remain `<`? My thinking: Logically, the thing on the left is the maximum index, and when you increment that thing, it needs to remain less than NElts to still be a valid index.
Not quite, if `NumSubElts` is 1, then the index is `IdxCst->getZExtValue()`, not `IdxCst->getZExtValue() + 1`. Perhaps it's better to think of this like the following:
`IdxCst->getZExtValue() + (NumSubElts - 1) < NElts`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105016/new/
https://reviews.llvm.org/D105016
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