[PATCH] D102852: [RISCV] Fix a crash when lowering split float arguments

[Luís Marques via Phabricator via llvm-commits]

luismarques added a comment.

In D102852#2829369 <https://reviews.llvm.org/D102852#2829369>, @luismarques wrote:

> Sorry, not "spilling", using them to copy the remaining arguments. The code is loading arguments from the stack (plus GPR args) and passing most of them in the `fa<N>` and `ft<N>` (I assume that's our fastcc convention), and using the `fs<N>` registers to copy the remaining arguments to the proper place in the stack, right? So the `0-63(sp)` stack usage still seems OK, that's our frame, that we use it to spill `ra` and to pass the remaining arguments.

To be clear, it's fine not to save the callee-saved registers as that RUN invocation isn't targeting a hard-float ABI. One thing that seems we aren't checking properly is that fastcc still works even if we change `-mattr=+f,+d` to `-mattr=-f,-d`, as it still uses the floating-point registers and instructions. I suppose it should either complain or use a different convention?


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https://reviews.llvm.org/D102852