[PATCH] D102852: [RISCV] Fix a crash when lowering split float arguments

[Luís Marques via Phabricator via llvm-commits]

luismarques added a comment.

In D102852#2829300 <https://reviews.llvm.org/D102852#2829300>, @luismarques wrote:

> Sorry if I'm misunderstanding your point, but we *are* accessing `0-63(sp)` (later below). Am I reading the assembly totally wrong or does it seem to be spilling the original values of the floating-point callee-saved registers *after* killing their old values (by loading into them some of the arguments passed on the stack, as part of preparing the fastcc call), and never restoring them?

Sorry, not "spilling", using them to copy the remaining arguments. The code is loading arguments from the stack (plus GPR args) and passing most of them in the `fa<N` and `ft<N>` (I assume that's our fastcc convention), and using the `fs<N>` registers to copy the remaining arguments to the proper place in the stack, right? So the `0-63(sp)` stack usage still seems OK, that's our frame, that we use it to spill `ra` and to pass the remaining arguments.


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https://reviews.llvm.org/D102852